...
MP:FFFFFFFF80002FEA| csrrc x9,sstatus,x5 // atomic read and clear bits in CSR.
MP:FFFFFFFF80002FEE| csrr x18,sepc
MP:FFFFFFFF80002FF2| csrr x19,stval
MP:FFFFFFFF80002FF6| csrr x20,scause
MP:FFFFFFFF80002FFA| csrr x21,sscratch
void handle_exception()
{
word scause;
word offset_vect;
void *exception_func;
bool interrupt_status;
scause = sys_csr_reg_read(scause); // csrr x20,scause
interrupt_status = scause >> (SXLEN -1); //
if ( interrupt_status == true) {
la_reg = ret_from_exception; // la ra, ret_from_exception
handle_arch_irq();
}
else {
la_reg = ret_from_exception; // la ra, ret_from_exception
if (scause & 0b1000) {
handle_syscall();
}
else {
offset_vect = get_exception_reason(scause);
exception_func = excp_vect_table + offset_vect;
(void*)exception_func; // c.jr x5
}
}
}
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