AMD:
https://docs.amd.com/r/en-US/ug1629-microblaze-v-user-guide/Machine-Cause-Register-mcause
SBI specification:
https://www.scs.stanford.edu/~zyedidia/docs/riscv/riscv-sbi.pdf
SBI Reference:
https://docs.rs/sbi/latest/sbi/legacy/index.html
The RISC-V Advanced Interrupt Architecture:
https://github.com/riscv/riscv-aia/releases
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