This page contains the signature when exception occurs in the RISC-V device:
https://www.codethink.co.uk/articles/2021/RISC-V-user-space-access-oops/
https://lore.kernel.org/lkml/e2203659-e1ac-4fbf-9b5d-2c561255b645@spud/T/
https://lpc.events/event/16/contributions/1171/attachments/1073/2076/RISC-V%20ftrace%20Working%20with%20Preemption%20@%20LPC22-1.pdf